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rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a ADG819/adg820 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700www.analog.com fax: 781/326-8703 ? analog devices, inc., 2002 0.5 cmos 1.8 v to 5.5 v 2:1 mux/spdt switches functional block diagram ADG819/ adg820 in s1 s2 d switches shown for a logic ??input features low on resistance 0.8 max at 125 c 0.25 max on resistance flatness 1.8 v to 5.5 v single supply 200 ma current carrying capability automotive temperature range: C40 c to +125 c rail-to-rail operation 6-lead sot-23 package, 8-lead soic package, and 6-bump microcsp (micro chip scale package) ADG819 fast switching times typical power consumption (<0.01 w) ttl-/cmos-compatible inputs pin compatible with the adg719 (ADG819) applications power routing battery-powered systems communication systems data acquisition systems cellular phones modems pcmcia cards hard drives relay replacement general description the ADG819 and the adg820 are monolithic, cmos, spdt (single-pole, double-throw) switches. these switches are de signed on a submicron process that provides low power dissipation yet gives high switching speed, low on resistance, and low leakage currents. low power consumption and an operating supply range of 1.8 v to 5.5 v make the ADG819 and adg820 ideal for battery-pow- ered, portable instruments. each switch of the ADG819 and the adg820 conducts equally well in both directions when on. the ADG819 exhibits break- before-make switching action, thus preventing momentary sh orting when switching channels. the adg820 exhibits make-before- break action. the ADG819 and the adg820 are available in a 6-lead sot-23 package and an 8-lead soic package. the ADG819 is also available in a 2 3 bump 1.14 mm 2.18 mm microcsp package. this chip occupies only a 1.14 mm 2.18 mm area, making it the ideal candidate for space-constrained applications. product highlights 1. very low on resistance, 0.5 ? typical 2. 1.8 v to 5.5 v single-supply operation 3. high current carrying capability 4. tiny 6-lead sot-23 package, 8-lead soic package, and 2 3 bump 1.14 mm 2.18 mm microcsp package (ADG819 only)
rev. 0 ?2? ADG819/adg820especifications 1 (v dd = 5 v 10%, gnd = 0 v.) e40 c to e40 c to parameter 25 c +85 c +125 c 2 unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 0.5 typ v s = 0 v to v dd , i s = 100 ma; 0.6 0.7 0.8 max test circuit 1 on resistance match between channels ( r on )0.06 typ v s = 0 v to v dd , i s = 100 ma 0.08 0.1 0.12 max on resistance flatness (r flat(on) ) 0.1 typ v s = 0 v to v dd , i s = 100 ma 0.17 0.2 0.25 max leakage currents v dd = 5.5 v source off leakage i s (off) 0.01 na typ v s = 4.5 v/1 v, v d = 1 v/4.5 v; 0.25 3 10 na max test circuit 2 channel on leakage i d , i s ( on) 0.01 na typ v s = v d = 1 v, or v s = v d = 4.5 v; 0.25 3 25 na max test circuit 3 digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.8 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max c in, digital input capacitance 5 pf typ dynamic characteristics 3 ADG819 t on 35 ns typ r l = 50 , c l = 35 pf, 45 50 55 ns max v s = 3 v; test circuit 4 t off 10 ns typ r l = 50 , c l = 35 pf, 16 18 21 ns max v s = 3 v; test circuit 4 break-before-make time delay, t bbm 5 ns typ r l = 50 , c l = 35 pf, 1 ns min v s1 = v s2 = 3 v; test circuit 5 adg820 t on 10 ns typ r l = 50 , c l = 35 pf, 18 20 22 ns max v s = 3 v; test circuit 4 t off 26 ns typ r l = 50 , c l = 35 pf, 40 45 50 ns max v s = 3 v; test circuit 4 make-before-break time delay, t mbb 15 ns typ r l = 50 , c l = 35 pf, 1 ns min v s = 0 v; test circuit 6 charge injection 20 pc typ v s = 2.5 v, r s = 0 , c l = 1 nf; test circuit 7 off isolation e71 db typ r l = 50 , c l = 5 pf, f = 100 khz; test circuit 8 channel-to-channel crosstalk e72 db typ r l = 50 , c l = 5 pf, f = 100 khz; test circuit 10 bandwidth e3 db 17 mhz typ r l = 50 , c l = 5 pf; test circuit 9 c s (off) 80 pf typ f = 1 mhz c d, c s (on) 300 pf typ f = 1 mhz power requirements v dd = 5.5 v digital inputs = 0 v or 5.5 v i dd 0.001 a typ 1.0 2.0 a max notes 1 temperature range is as follows: e40 c to +125 c. 2 on resistance parameters tested with i s = 10 ma. 3 guaranteed by design, not subject to production test. specifications subject to change without notice.
rev. 0 ?3? ADG819/adg820 specifications 1 (v dd = 2.7 v to 3.6 v, gnd = 0 v.) e40 c to e40 c to parameter 25 c +85 c +125 c 2 unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 0.7 typ v s = 0 v to v dd , i s = 100 ma; 1.4 1.5 1.6 max test circuit 1 on resistance match between channels ( r on )0.06 typ v s = 0 v to v dd , i s = 100 ma 0.13 0.13 max on resistance flatness (r flat(on) )0.25 typ v s = 0 v to v dd , i s = 100 ma leakage currents v dd = 3.6 v source off leakage i s (off) 0.01 na typ v s = 3.3 v/1 v, v d = 1 v/3.3 v; 0.25 3 10 na max test circuit 2 channel on leakage i d , i s ( on) 0.01 na typ v s = v d = 1 v, or v s = v d = 3.3 v; 0.25 3 25 na max test circuit 3 digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.8 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max c in, digital input capacitance 5 pf typ dynamic characteristics 3 ADG819 t on 40 ns typ r l = 50 , c l = 35 pf, 60 65 70 ns max v s = 1.5 v; test circuit 4 t off 10 ns typ r l = 50 , c l = 35 pf, 16 18 21 ns max v s = 1.5 v; test circuit break-before-make time delay, t bbm 40 ns typ r l = 50 , c l = 35 pf, 1 ns min v s1 = v s2 = 1.5 v; test circuit 5 adg820 t on 20 ns typ r l = 50 , c l = 35 pf, 35 40 45 ns max v s = 1.5 v; test circuit 4 t off 30 ns typ r l = 50 , c l = 35 pf, 45 50 55 ns max v s = 1.5 v; test circuit 4 make-before-break time delay, t mbb 10 ns typ r l = 50 , c l = 35 pf, 1 ns min v s = 1.5 v; test circuit 6 charge injection 10 pc typ v s = 1.5 v, r s = 0 , c l = 1 nf; test circuit 7 off isolation e71 db typ r l = 50 , c l = 5 pf, f = 100 khz; test circuit 8 channel-to-channel crosstalk e72 db typ r l = 50 , c l = 5 pf, f = 100 khz; test circuit 10 bandwidth e3 db 17 mhz typ r l = 50 , c l = 5 pf; test circuit 9 c s (off) 80 pf typ f = 1 mhz c d , c s (on) 300 pf typ f = 1 mhz power requirements v dd = 3.6 v digital inputs = 0 v or 3.6 v i dd 0.001 a typ 1.0 2.0 a max notes 1 temperature range is as follows: e40 c to +125 c. 2 on resistance parameters tested with i s = 10 ma. 3 guaranteed by design, not subject to production test. specifications subject to change without notice.
rev. 0 ADG819/adg820 ?4? absolute maximum ratings 1 (t a = 25 c, unless otherwise noted.) v dd to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . e0.3 v to +7 v analog inputs 2 . . . . . . . . . . . . . . . . . e0.3 v to v dd + 0.3 v or . . . . . . . . . . . . . . . . . . . . . . . 30 ma, whichever occurs first digital inputs 2 . . . . . . . . . . . . . . . . . e0.3 v to v dd + 0.3 v or . . . . . . . . . . . . . . . . . . . . . . . 30 ma, whichever occurs first peak current, s or d . . . . . . . . . . . . . . . . . . . . . . . . . 400 ma . . . . . . . . . . . . . . . .( pulsed at 1 ms, 10% duty cycle max) continuous current, s or d . . . . . . . . . . . . . . . . . . . 200 ma operating temperature range industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . e40 c to +85 c automotive . . . . . . . . . . . . . . . . . . . . . . . . e40 c to +125 c storage temperature range . . . . . . . . . . . . e65 c to +150 c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150 c soic package ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 206 c/w jc thermal impedance . . . . . . . . . . . . . . . . . . . . . . 44 c/w sot-23 package (4-layer board) ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 119 c/w microcsp package ja thermal impedance . . . . . . . . . . . . . . . . . . . . . . . . tbd lead temperature, soldering (10 sec) . . . . . . . . . . . . 300 c ir reflow, peak temperature (<20 sec) . . . . . . . . . . . 235 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. 2 overvoltages at in, s, or d will be clamped by internal diodes. current should be limited to the maximum ratings given. table i. truth table for the ADG819/adg820 in switch s1 switch s2 0 on off 1 off on pin configurations 6-lead sot-23 (rt-6) top view (not to scale) 6 5 4 1 2 3 in s2 ADG819/ adg820 v dd gnd d s1 8-lead soic (rm-8) top view (not to scale) 8 7 6 5 1 2 3 4 nc = no connect d s2 ADG819/ adg820 s1 v dd gnd nc in nc 2 3 microcsp s2 in s1 v dd d gnd ADG819 only top view (bumps at the bottom) not to scale 1 2 3 6 5 4 ordering guide m odel option temperature range brand 1 package description package ADG819brm e40 c to +125 c snb soic (microsmall outline ic) rm-8 ADG819brt e40 c to +125 c snb sot-23 (plastic surface-mount) rt-6 2 ADG819bcb e40 c to +85 c snb microcsp (micro chip scale package) cb-6 2 adg820brm e40 c to +125 c spb soic (microsmall outline ic) rm-8 adg820brt e40 c to +125 c spb sot-23 (plastic surface-mount) rt-6 2 notes 1 branding on these packages is limited to three characters due to space constraints. 2 contact factory for availability.
rev. 0 ADG819/adg820 ?5? caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ADG819/ adg820 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device terminology v dd most positive power supply potential gnd ground (0 v) reference i dd positive supply current s source terminal. may be an input or output. dd rain terminal. may be an input or output. in logic control input r on ohmic resistance between d and s r on on resistance match between any two channels, i.e., r on max e r on min r flat(on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. i s (off) source leakage current with the switch off i d , i s (on) channel leakage current with the switch on v d (v s )a nalog voltage on terminals d, s v inl maximum input voltage for logic 0 v inh minimum input voltage for logic 1 i inl (i inh ) input current of the digital input c s (off) off switch source capacitance c d , c s (on) on sw itch capacitance t on delay between applying the digital control input and the output switching on. t off delay between applying the digital control input and the output switching off. t bbm off time or on time measured between the 90% points of both switches when switching from one address state to another. t mbb on time measured between the 80% points of both switches when switching from one ad dress state to another. charge injection a measure of the glitch impulse transferred from the digital input to the analog output during switching. crosstalk a measure of unwanted signal coupled through from one channel to another as a result of parasitic capacitance. off isolation a measure of unwanted signal coupling through an off switch. bandwidth frequency at which the output is attenuated by e3 db. on response frequency response of the on switch insertion loss loss due to the on resistance of the switch
rev. 0 ADG819/adg820 ?6? et ypical performance characteristics v d , v s e v 1.0 012345 on resistance e 0.8 0.6 0.4 0.2 0 0.9 0.7 0.5 0.3 0.1 t a = 25 c v dd = 3v v dd = 5.5v v dd = 5v v dd = 4.5v v dd = 2.7v v dd = 3.3v tpc 1. on resistance vs. v d (v s ) v d , v s e v 10 0 0.2 0.6 1.0 1.2 1.6 on resistance e 8 6 4 2 0 9 7 5 3 1 t a = 25 c v dd = 1.8v 0.4 0.8 1.4 1.8 tpc 2. on resistance vs. v d (v s ) temperature e c 10 060 leakage currents e na 6 4 2 0 e2 20 40 100 120 80 8 i s (off) i d , i s (on) v dd = 3v, 5v tpc 3. leakage currents vs. temperatures v d , v s e v 1.0 0 1.5 on resistance e 0.8 0.6 0.4 0.2 0 v dd = 3v 0.5 1.0 2.5 3.0 t a = +85 c t a = +125 c t a = +25 c t a = e40 c 2.0 tpc 4. on resistance vs. v d (v s ) for different temperatures v d , v s e v 1.0 03 on resistance e 0.8 0.6 0.4 0.2 0 v dd = 5v 12 45 t a = +85 c t a = +125 c t a = +25 c t a = e40 c tpc 5. on resistance vs. v d (v s ) for different temperatures temperature e c 50 e40 20 time e ns 40 30 20 10 0 e20 0 80 120 40 t on 60 100 t off v dd = 3v, 5v v dd = 5v v dd = 3v tpc 6. t on /t off times vs. temperature (ADG819)
rev. 0 ADG819/adg820 ?7? v s e v 250 0 3.0 charge injection e pc 150 0 e100 e150 e200 v dd = 3v 1.0 2.0 4.0 5.0 t a = 25 c 200 100 50 e50 2.5 0.5 1.5 3.5 4.5 v dd = 5v tpc 7. charge injection vs. source voltage frequency e mhz 0 0.1 attenuation e db e20 e50 e70 e80 e90 2 e10 e30 e40 e60 1 v dd = 5v, 3v t a = 25 c tpc 8. off isolation vs. frequency frequency e mhz 0 0.1 attenuation e db e20 e50 e70 e80 e90 2 e10 e30 e40 e60 1 tpc 9. crosstalk vs. frequency frequency e mhz 0 0.2 attenuation e db e2 e5 e6 10 e1 e3 e4 1 1 30 v dd = 3v, 5v t a = 25 c tpc 10. on response vs. frequency v dd e v 1.6 0 1.2 0.6 0.4 2 1.4 1.0 0.8 1 1.8 3 t a = 25 c 0.2 0 logic threshold voltage e v 456 rising falling tpc 11. logic threshold vs. supply voltage
rev. 0 ADG819/adg820 ?8? t est circuits sd v1 v s r on = v1 / i os i ds test circuit 1. on resistance s d v s v d i d (off) i s (off) test circuit 2. off leakage s d v d i d (on) nc nc = no connect test circuit 3. on leakage v s r l 50 c l 35pf in gnd v dd v dd 0.1 f v out v in 50% 90% 90% t on t off 50% test circuit 4. switching times v s2 r l 50 c l 35pf v out in gnd v dd v dd 0.1 f s2 s1 v s1 v in v out v in 0v 0v 50% 90% 90% t bbm t bbm 50% d test circuit 5. break-before-make time delay, t bbm (ADG819 only) r l2 300 c l2 35pf v s2 in gnd v dd v dd 0.1 f v d r l1 300 c l1 35pf v s1 v in v in 0v 50% 90% 80% v d 80% v d 50% v s1 v s2 t mbb test circuit 6. make-before-break time delay, t mbb (adg820 only)
rev. 0 ADG819/adg820 ?9? v s c l 1nf in gnd v dd v dd v out sw off sw off sw off sw off sw on sw on q inj = c l v out v out v in v in r s v out test circuit 7. charge injection in gnd v dd v dd 0.1 f 50 v in s d network analyzer v out r l 50 v s 50 off isolation = 20 log v out v s test circuit 8. off isolation in gnd v dd v dd 0.1 f v in s d network analyzer v out r l 50 v s 50 insertion loss = 20 log v out with switch v out without switch test circuit 9. bandwidth gnd v dd 0.1 f s2 s1 d in network analyzer v out r l 50 v s r 50 channel-to-channel crosstalk = 20 log v out v s v dd 50 test circuit 10. channel-to-channel crosstalk
rev. 0 ADG819/adg820 ?10? outline dimensions 6-lead plastic surface-mount package (rt-6) dimensions shown in inches and (mm) 1 3 4 5 2 6 0.1220 (3.10) 0.1063 (2.70) pin 1 0.0709 (1.80) 0.0591 (1.50) 0.1181 (3.00) 0.0984 (2.50) 0.0748 (1.90) bsc 0.0374 (0.95) bsc 0.0091 (0.23) 0.0031 (0.08) 0.0217 (0.55) 0.0138 (0.35) 10 0 0.0197 (0.50) 0.0098 (0.25) 0.0059 (0.15) 0.0000 (0.00) 0.0512 (1.30) 0.0354 (0.90) seating plane 0.0571 (1.45) 0.0354 (0.90) coplanarity 8-lead soic package (rm-8) dimensions shown in inches and (mm) 0.0110 (0.28) 0.0031 (0.08) 0.0280 (0.71) 0.0161 (0.41) 33 27 0.1201 (3.05) 0.1118 (2.84) 85 4 1 0.1220 (3.10) 0.1142 (2.90) 0.1988 (5.05) 0.1870 (4.75) pin 1 0.0256 (0.65) bsc 0.1220 (3.10) 0.1142 (2.90) seating plane 0.0059 (0.15) 0.0020 (0.05) 0.0181 (0.46) 0.0079 (0.20) 0.0429 (1.09) 0.0370 (0.94) 0.1201 (3.05) 0.1118 (2.84) coplanarity 2 3 array for microcsp (cb-6) dimensions shown in millimeters and (inches) pin 1 identifier seating plane 1.34 (0.0528) 1.14 (0.0449) 0.94 (0.0370) 0.67 (0.0264) 0.57 (0.0224) 0.47 (0.0185) 0.24 (0.0094) 0.22 (0.0087) 0.20 (0.0079) 0.50 (0.0860) 0.50 (0.0197) ball pitch coplanarity 0.32 (0.0126) nom 0.32 (0.0126) 0.44 (0.0173) 0.36 (0.0142) 0.28 (0.0110) 2.38 (0.0937) 2.18 (0.0858) 1.98 (0.0780) 0.59 (0.0232) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design
?11?
?12? c02801?0?5/02(0) printed in u.s.a.

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